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AD9226 high-speed ADC module high-speed signal acquisition analog-to-digital conversion module 65M sampling data acquisition FPGA development board supporting -79477
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AD9226 high-speed ADC module high-speed signal acquisition analog-to-digital conversion module 65M sampling data acquisition FPGA development board supporting -79477

AD9226 High Speed ADC Module, FPGA Development Board, 65M Sampling

    product detail

    Module interface:
    The analog signal input interface uses SMA interface; the data interface uses 2.54 pitch female interface. The interface of the module is shown in the figure below.
    (8) This module is designed with a jack GND, which is used to connect the multimeter ground pen to facilitate user testing.
    (7) Digital signal interface: 2×14 double-row 2.54 pitch female seat, the direction is downward. Coupled with the power supply interface, the 2×16 double-row 2.54 pitch female seat is used, and the direction is downward.
    (6) Analog signal input interface: SMA interface.
    (5) Module power supply: +5V single power supply.
    (4) Digital interface level: 3.3V.
    (3) Analog signal bandwidth: -3dB bandwidth is 350MHz.
    (2) Analog signal input amplitude: ±5V (that is, 10Vpp input).
    (2) Maximum adoption rate: 65MSPS.
    (1) Module function: 12-bit high-speed ADC module with two independent channels.
    The main features of the module are as follows:

    Block diagram of the module: dual and independent

    The voltage input range of the module is -5V~+5V, that is, the signal with a peak-to-peak value of 10Vpp can be input. The module uses attenuation and offset circuits to condition the input signal and convert it into a 1V~3V (that is, a peak-to-peak value of 2Vpp) signal into the AD9226. That is, when -5V is input, the voltage at the ADC input is 3V; when 0V is input, the voltage at the ADC input is 2V; when +5V is input, the voltage at the ADC input is 1V. The block diagram of the high-speed AD module is shown below.